Resistor Picker · ShamrockCircuits

01Set the target

Target format

Input voltage (V)Output voltage (V)

Input voltage tolerance (± %)

Output is measured from the divider node to ground.

02Choose the resistors

Selections are combined into one value set. Overlapping values are counted once; E6 + E12 gives the same values as E12.

Enter Ω or use 4k7, 10k, 1M. E-series and tolerance are independent. Set min = max to fix a standard value.

03Node load / FB bias current

Include bias current

Off: select and calculate the ideal divider.

Nominal (nA)Minimum (nA)Maximum (nA)

+ draws current into the IC; − supplies current to the node. For ±100 nA leakage, enter nominal 0, minimum −100, maximum 100. 1 µA = 1,000 nA.

Ranks pairs by nominal error. Each result includes worst-case limits.

Best nominal match

Ready

Set your constraints, then find resistor pairs.

Loaded output

Nominal values for the selected pair. Arrows indicate positive current directions; negative values flow in reverse. Ibias is 0 A when correction is off. Enter Vin in ratio mode to show voltages and resistor currents.

Worst-case minimum

Worst-case maximum

Nominal calculations · selected pair

How the worst-case bounds are calculated

Candidate pairs

Choose a row to inspect its details

R1	R2	Output	Error	Minimum	Maximum

Equations & assumptions

R1 is the upper resistor and R2 connects the node to ground. In regulator mode the top rail is the regulated output, not the converter input supply.

Divider: Vnode = Vin × R2/(R1+R2) − Ibias × (R1 ∥ R2)

Series: Rtotal = R1+R2 · Parallel: Req = R1×R2/(R1+R2)

Positive bias current leaves the node and enters the IC. Current is modeled as constant over the operating range. The Include bias current toggle controls both resistor selection and all reported values. When off, all bias-current terms and limits are treated as zero; entered current values are preserved. Ratio mode reports the loaded Vnode/Vin and requires Vin for nonzero bias current.

Bounds evaluate every combination of the specified resistor, source/reference voltage and bias-current limits. These are independent worst-case bounds, not statistical estimates. Regulator mode assumes the control loop maintains the stated reference voltage. Temperature drift, clamp conduction, dynamic pin current, resistor self-heating and loop stability are not modeled.

The nominal E-series tables follow Vishay’s IEC 60063 table. Values from all selected series are merged without duplicates. All allowed pairs in your ranges are searched; the best 40 are shown. In series and parallel modes, swapped values are shown once. The retained assignment respects each resistor’s series and range; if both assignments are allowed and their tolerances differ, the assignment with lower worst-case error magnitude is retained (ties favor lower R1). Divider and feedback pairs retain their orientation. Numerically tied errors favor lower R1+R2, then lower R1. Matching decimal ratios may have tiny floating-point residuals.